With conventional memory components, in particular conventional semi-conductor memory components, a distinction is made between so-called function memory components (e.g. PLAs, PALs, etc.), and so-called table memory components, e.g. ROM components (ROM=Read Only Memory and/or fixed-value memory)—in particular PROMs, EPROMs, EEPROMs, Flash memory, etc.—, and RAM-components (RAM=Random Access Memory and/or Read/Write memory), for instance DRAMs and SRAMs.
A RAM component is a memory device in which data can be stored after an address has been specified, and from which the data can later be read out again under this address.
Because a RAM component needs to be provided with as many storage cells as possible, it becomes important for the creation of these cells to be kept as simple as possible.
With SRAMs (SRAM=Static Random Access Memory) the individual memory cells for instance consist of a few, e.g. six, transistors, and with so-called DRAMs (DRAM=Dynamic Random Access Memory) usually of only a single suitably controlled capacitive element (e.g. the gate source capacitance of a MOSFET), with the capacitance of which one bit at a time can be stored in the form of charge.
In any event, this charge only persists for a short period, which means that a so-called “refresh” must be performed regularly, e.g. ca. every 64 ms.
In contrast to this, SRAMs do not need any “refresh” to be performed on them; i.e., the data stored in the memory cell persists for as long as the SRAM is provided with an appropriate voltage supply.
In non-volatile memory components (NVMs and/or non-volatile memories), e.g. ROMs, PROMs, EPROMs, EEPROMs, and flash memories in contrast the stored data persists even when the supply voltage is switched off.
In ROM memory components the data in question can be secured during the manufacture of a corresponding memory component (i.e. by the manufacturer) by means of appropriate masks, for instance by providing either a discontinuity or a contact at an appropriate location on a corresponding memory cell matrix. In NMOS-ROM memory components this is for instance done by furnishing the corresponding transistors with an oxide layer of a different thickness between the gate and substrate. An oxide layer of “normal” thickness creates a conductive channel (d=1), while a “thicker than normal” oxide layer will prevent this (d=0).
PROMs are read only memories programmable by the user. The respective memory cells can for instance contain appropriate fuses (for instance thin CrNi layers) that can be melted by the application of suitable currents, and that thereby—irreversibly—have the data bit d=0 written into them. Alternatively the respective memory cells can for instance also contain special Mosfets, in which an additional isolated “floating gate” has been provided. This gate is given a charge during the programming of a corresponding memory cell, whereby the threshold voltage of the respective Mosfet is shifted.
EPROMs are multi-programmable non-volatile read only memory components, i.e. fixed-value memory components, in which the respective programming can be reversed by the user by means of an appropriate erasing program. Mosfets with additional isolated “floating gates” that can be correspondingly charged for programming, are for instance—as with many PROMs—able to be used as memory cells. By means of irradiating the EPROM with UV light the floating gate charge of (all) Mosfets can be reset, whereby the programming (of the whole EPROM) is reversed again.
An EEPROM is understood to be a multi-programmable read only memory component, in which the respective programming can—in contrast with an (UV erasable) EPROM—be electrically reversed bit by bit, byte by byte or one page at a time.
A flash memory and/or flash EEPROM represents a hybrid between an EPROM and an EEPROM. A flash EEPROM is a multi-programmable read only memory component, which—similar to an EEPROM—is electrically erasable, not however bit by bit, or byte by bite, but rather—correspondingly similar to an EPROM—always in its entirety.
In order to program the corresponding memory cells of PROMs, EPROMs, EEPROMs, flash memories, etc. the corresponding memory cells must be charged with (programming) currents of a predetermined level and duration.
In order to read a corresponding memory cell (i.e. in order to determine whether a data bit d=0 or a data bit d=1 has been stored there) so-called reference currents can be used.
A read current resulting for instance from the reading of a memory cell can be compared with a reference current (for instance—in a flash memory—with a reference current at a level of for instance 15 μA (or for instance 5 μA or 20 μA)); depending on whether the corresponding read current is larger or smaller than the corresponding reference current (for instance—depending on the respective cell state—for instance ca. 0 μA (in particular for instance <5 μA), or for instance ca. 30 μA (in particular for instance >20 μA)), it can be determined whether a data bit d=1, or a data bit d=0 has been stored in the corresponding cell.
When testing a read only memory component, an attempt can be made to determine the exact level of the respective read current (for instance for fault finding, or for instance—in accordance with the respective test result—to correspondingly adjust the level and/or duration of the (programming) currents and/or voltages for the normal operation of the memory component, and/or the level of the reference current used in each case, etc., etc.).
The conventionally applied procedures for the testing of a read only memory component in order to measure memory cell currents, in particular read currents, are relatively inaccurate.